PNRPU Bulletin. Electrotechnics, Informational Technologies, Control Systems

Issue	Title
No 6 (2012)	OTsENKA EFFEKTIVNOSTI OTKAZOUSTOYChIVOY PLIS NA OSNOVE FUNKTsIONAL'NO-POLNYKh TOLERANTNYKh ELEMENTOV	Abstract (Rus)
Grekov A.V., Korzhev V.S., Grekova O.V.
Vol 1, No 7 (2013)	ENERGOEFFEKTIVNYE VYChISLENIYa I OBESPEChENIE OTKAZOUSTOYChIVOSTI SISTEM UPRAVLENIYa	Abstract (Rus)
Grekova O.V., Grekov A.V.
No 8 (2013)	REKONFIGURATsIYa I DIAGNOSTIROVANIE LOGIKI PLIS FPGA	Abstract (Rus)
Tyurin S.F., Gromov O.A., Gorodilov A.Y.
No 1 (2014)	THE ANALYSIS OF SELF-TIMED FULL-ADDER IN TERMS OF FAULT-TOLERANCE	Abstract (Rus)
Tyurin S.F., Kamenskih A.N.
No 2 (2014)	THE PROTECTION OF DIGITAL DEVICE FROM SIGNEL STUCK-AT FAULT USING REDUNDANT TRANSISTOR STRUCTURES	Abstract (Rus)
Tyurin S.F., Kamenskih A.N.
No 4 (2015)	WEAK MULLER’S C-GATE	Abstract (Rus)
Kamenskih A.N., Tyurin S.F.
No 37 (2021)	THE DEVELOPMENT OF FAULT-TOLERANT LOGIC GATE LIBRARY USING TRANSISTOR-LEVEL REDUNDANCY METHOD	Abstract (Rus)
Kamenskikh A.N.
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