Issue Title
No 3 (2014) INCREASING THE RELIABILITY OF THE LUT FPGA OPERATION
Abstract PDF
(Rus)
Tyurin S.F.
No 2 (2015) TRANSISTOR TREE TO IMPLEMENT SYSTEMS OF LOGIC FUNCTIONS
Abstract PDF
(Rus)
Tyurin S.F.
No 15 (2015) AUTOMATIC SYNTHESIS OF COMBINATIONAL CIRCUITS USING QUARTUSII STATE MACHINE EDITOR
Abstract PDF
(Rus)
Tyurin S.F.
No 1 (2016) SELF-TIMED ELEMENTS AND DEVICES
Abstract PDF
(Rus)
Bereznyakov S.V., Averkiev M.A.
No 19 (2016) REALIZATION OF 6 INPUT LUT IN ADAPTIVE LOGIC MODULE
Abstract PDF
(Rus)
Tyurin S.F.
No 37 (2021) SCALING OF THE RELIABILITY FPGA
Abstract PDF
(Rus)
Grekov A.V.
No 29 (2019) FPGA LUT WITH TWO SHANNON DECOMPOZITION OUTPUTS
Abstract PDF
(Rus)
Tyurin S.F., Chudinov M.A.
No 31 (2019) HARDWARE NEURAL NETWORKS PROGRESS ON FPGA AND ASIC
Abstract PDF
(Rus)
Shipitsin S.P., Iamaev M.I.
No 38 (2021) PROVIDING HIGH RELIABILITY OF FPGAs FOR CRITICAL APPLICATIONS BASED ON HYBRID REDUNDANCY
Abstract PDF
(Rus)
Grekov A.V.
No 40 (2021) MATHEMATICAL MODEL OF AN ARTIFICIAL NEURAL NETWORK FOR FPGA DEVICES AND MICROCONTROLLERS FOCUSED ON FOG COMPUTING
Abstract PDF
(Rus)
Bakhtin V.V.
1 - 10 of 10 Items

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