PNRPU Bulletin. Electrotechnics, Informational Technologies, Control Systems

Issue	Title
No 3 (2014)	INCREASING THE RELIABILITY OF THE LUT FPGA OPERATION	Abstract (Rus)
Tyurin S.F.
No 1 (2016)	SELF-TIMED ELEMENTS AND DEVICES	Abstract (Rus)
Bereznyakov S.V., Averkiev M.A.
No 19 (2016)	REALIZATION OF 6 INPUT LUT IN ADAPTIVE LOGIC MODULE	Abstract (Rus)
Tyurin S.F.
No 23 (2017)	FAULT TOLERANT PROGRAMMABLE LOGIC ARRAY	Abstract (Rus)
Tyurin S.F., Prokhorov A.S.
No 24 (2017)	SIMULATION AND OPTIMIZATION OF INNOVATIVE FPGA’s LOGICAL ELEMENTS	Abstract (Rus)
Vikhorev R.V., Prokhorov A.S., Tyurin S.F., Nikitiin A.S.
No 31 (2019)	HARDWARE NEURAL NETWORKS PROGRESS ON FPGA AND ASIC	Abstract (Rus)
Shipitsin S.P., Iamaev M.I.
Vol 1, No 7 (2013)	SRAVNENIE MODELEY VNEShNIKh OTKAZOV ELEMENTARNOGOMUL'TIPLEKSORA LOGIChESKOGO ELEMENTA PLIS FPGA OTNOSITEL'NO POKRYVAYuShchIKh TESTOVYKh NABOROV	Abstract (Rus)
Tyurin S.F., Ermakov S.V., Gorodilov A.Y.
No 38 (2021)	PROVIDING HIGH RELIABILITY OF FPGAs FOR CRITICAL APPLICATIONS BASED ON HYBRID REDUNDANCY	Abstract (Rus)
Grekov A.V.
No 8 (2013)	REKONFIGURATsIYa I DIAGNOSTIROVANIE LOGIKI PLIS FPGA	Abstract (Rus)
Tyurin S.F., Gromov O.A., Gorodilov A.Y.
No 40 (2021)	MATHEMATICAL MODEL OF AN ARTIFICIAL NEURAL NETWORK FOR FPGA DEVICES AND MICROCONTROLLERS FOCUSED ON FOG COMPUTING	Abstract (Rus)
Bakhtin V.V.
No 2 (2015)	METHOD OF DIAGNOSTIC DIGITAL CIRCUIT WITH PROGRAMMABLE PLD ON PRODUCTION STAGE	Abstract (Rus)
Kiselyov V.V., Suvorov N.A.
No 2 (2015)	TRANSISTOR TREE TO IMPLEMENT SYSTEMS OF LOGIC FUNCTIONS	Abstract (Rus)
Tyurin S.F.
No 15 (2015)	AUTOMATIC SYNTHESIS OF COMBINATIONAL CIRCUITS USING QUARTUSII STATE MACHINE EDITOR	Abstract (Rus)
Tyurin S.F.
1 - 13 of 13 Items

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